The present invention generally relates to semiconductor devices, and more specifically, to forming metal-insulator-metal capacitors.
The MOSFET is a transistor used for amplifying or switching electronic signals. The MOSFET has a source, a drain, and a metal oxide gate electrode. The metal gate is electrically insulated from the main semiconductor n-channel or p-channel by a thin layer of insulating material, for example, silicon dioxide or glass, which makes the input resistance of the MOSFET relatively high. The gate voltage controls whether the path from drain to source is an open circuit (“off”) or a resistive path (“on”).
N-type field effect transistors (NFET) and p-type field effect transistors (PFET) are two types of complementary MOSFETs. The NFET uses electrons as the current carriers and with n-doped source and drain junctions. The PFET uses holes as the current carriers and with p-doped source and drain junctions.
The FinFET is a type of MOSFET. The FinFET is a double-gate or multiple-gate MOSFET device that mitigates the effects of short channels and reduces drain-induced barrier lowering. The “fin” refers to the narrow channel between source and drain regions. A thin dielectric layer on either side of the fin separates the fin channel from the gate.
A metal-insulator-metal capacitor is a capacitor that has an insulator portion arranged between two metal portions. The two metal portions act as conductors of the capacitor.
As the scaling of semiconductor devices continues to decrease, the formation of transistors and capacitors in close proximity continues to become more difficult. There are various limitations with aligning photolithographic masks to perform etching processes that form transistors and capacitors. As the scale of the devices becomes smaller, aligning photolithographic masks becomes more difficult.